1. Field of the Invention
This invention relates to a device used in a chamber for affixing a wafer, and more particularly, to a device that protects the edge of a wafer and also affixes the wafer during a fabrication process.
2. Description of Related Art
FIG. 1A is a structural diagram showing a clamp used to affix a wafer, and FIG. 1B is a locally magnified diagram of the area 126 shown in FIG. 1A.
Referring to both FIGS. 1A and 1B, while an etching process is performed in a MXP oxidation chamber, a wafer 100 is placed on a stage (not shown in figures), wherein the wafer 100 contains device regions 102. The stage contains ducts used to feed gas to the back of the wafer 100 for cooling the wafer 100 during the etching process.
The back of the wafer 100 has to stick tight to the ducts to prevent the cooling gas leaking into the chamber, since the leaked cooling gas in the chamber interrupts the reaction and further damages the wafer. Hence, A conventional method for affixing the wafer 100 is to utilize a clamp 120 on the top of the wafer 100, wherein the radius of the inner surface 122 of the clamp 120 is longer than the radius of the wafer 100. The difference between the radius of the wafer 100 and the radius of the inner surface 122 of the clamp 120 is d1, as shown in FIG. 1B. that exposes the edge of the wafer 100. There are 12 sharp protuberances 124 protuberating toward the center of the clamp, wherein the distance d2 from the tip of the sharp protuberance 124 to the inner surface 122 of the clamp 120 is about 3 mm. and wherein d2 is greater than d2. Conventionally, those sharp protuberances 124 of the clamp 120 are used to affix the wafer 100.
FIGS. 2A and 2B are structural diagrams showing the wafer used in a deep trench mask opening (DTMO) process and a deep trench (DT) etching process performed in a MXP oxidation chamber, wherein the DTMO process is a pre-step of the DT etching process.
Referring to FIG. 2A, an oxide layer 202 and a silicon nitride layer 204 are formed on a substrate 200. By using a patterned photoresist layer 206, the pattern 208 on the photoresist layer 206 is transferred to the silicon nitride layer 204 and the oxide layer 202, wherein the pattern 208 is used to form deep trenches. Because the edge 210 of the substrate 200 is not covered by the photoresist layer 206, the silicon nitride layer 204 and the oxide layer 202 located on the edge 210 of the substrate 200 are moved by the patterning process used to transfer pattern 208 onto the substrate 200.
Referring next to FIG. 2B, a DT etching process is performed on the substrate 200 by using the patterned silicon nitride layer 204 and oxide layer 202 as etching masks to form deep trenches 208' on the substrate 200. In the mean time, the etching process removes a portion of the edge 210 of the substrate 200 as well, wherein the edge 210' after the etching process is shown in FIG. 2B.
According to the foregoing, the removal of the edge 210 of the substrate 200 by the foregoing etching process generates a large amount of particles that causes defects on the follow-up processes or even abandoning the entire wafer. Because a conventional clamp cannot provide enough protection to the edge 210 of the substrate 200, the occurrence of loss caused in an etching process cannot be avoided.
Furthermore, as referring to FIG. 1B, the sharp protuberances 124 for affixing a wafer 100 block some of the device regions 102 that degrades the effect of processes over the neighboring area. Moreover, those sharp protuberances 124 further worsens the equability of the plasma generated during the etching process that degrades the performance of processes over the blocked area, and the neighboring area as well.
There is another conventional clamp that provides protection to the edge of a wafer without using sharp protuberances but covering the entire edge of a wafer by shortening the radius of the inner surface. Because the device regions on the wafer cannot be covered, the clamp can only cover a ring-type area that is about 1 mm in width on the edge of the wafer.
Even though the foregoing clamp provides pretty good protection to the wafer to prevent the occurrence of peeling problem in an etching process, the tiny affixed area cannot provide enough stress to hold the wafer in position. Once the wafer is slightly off position, the cooling gas lcaking from the back of the wafer interrupts the ongoing process.
In addition, even though the wafer is held still during the process, the loss of the clamp caused by the etching process enlarges the radius of the inner surface of the clamp. After being used in the chamber for a period of about 40 hours, the clamp can no longer affix the wafer properly. Because of the short lifetime of the clamp, the cost of the clamp, and the time wasted by replacing the clamp frequently, the production is seriously degraded.